Please check the following.
- The interrupt priority level of the corresponding interrupt is set to higher than the processor interrupt priority level (IPRn, IPL)
- Interrupt requests are enabled by the ICU for the corresponding interrupt (IERm)
- The interrupt enable bit of the corresponding peripheral module is set to "enabled"
- The module-stop state of the corresponding peripheral module is canceled (MSTPCRA to MSTPCRC)
For details, please see the Interrupt Controller, I/O Ports, and Low Power Consumption chapters and the chapter for the corresponding peripheral module in the User's Manual: Hardware.