The procedure is described in the “I2C bus Interface” chapter of the hardware manual for your product. Please check the information which is given there.
The latest hardware manual is available from Documentation
The following provides additional information about the flow described in the manual. This should be read in conjunction with the manual.
When continuous receive operation is not used in the master receive mode, set “RCVD bit ← 1”.
- After performing steps (1) and (2), skip steps (3) to (7) and then perform step (8).
Step (8) is a dummy read of the ICDRR register.
- After performing step (9), return to step (8), and then repeat steps (8) and (9).
It is not necessary to generate a stop condition until the last data is received.
- To read the receive data of (last byte - 1) in step (8), set the ACKBT bit in step (7) before performing step (8).
Setting “RCVD bit ← 1” is not required here.
- After the data of the last byte has been received, perform the remaining steps according to the flow described in the hardware manual.
When using the I2C bus interface in master receive mode, also refer to the Technical Update “TN-16C-A166A/E: Notes on I2C bus interface in Master Receive Mode”.